Pioneer cx 680 service manual
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Page 1
CX-680 2 1. CIRCUIT DESCRIPTIONS 1.1 Preamplifier (UPC2572GS: IC101) Fig. 1 Block Diagram of UPC2572GS Fig. 2 APC Circuit The preamplifier processes pickup output signals to generate signals to be sent to the servo, demodula- tor, and controller. The preamplifier with built-in photodetector converts signals from the pickup into intermediate voltage in the pickup. Then, addition is made in the RF amplifier (IC101) to obtain RF, FE, TE, and TE zero cross signals. The system consists of the UPC2572GS and other components explained below. The system uses a single power source (+5 V). There- fore, the reference voltage of IC101 and the reference voltage of the power unit and servo circuit are REFO (+2.5 V). REFO is obtained from REFOUT of servo LSI (IC201: UPD63702GF) via a buffer, and is output from Pin 19 of IC101. This REFO is used as reference for all measurements. Note: Do NOT short-circuit REFO and GND during measurement. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 X12 RF envelope AGC Detection X3 Phase detection 3T detection Bottom DC shift Peak Control DC shift Bottom Peak 120kW DEFECT circuit FEBALFE BAL Vcc Mirror circuit FEBAL APC X2 Vcc FE-BAL TE-BAL ASY EFM-OUT C.DEF DEFECT RFOK MIRR 3T-OUT C.FE FE-OUT FE- GND TE- TE-OUT1 TE-OUT2 DET-IN DET-OUT VREF-IN VREF-OUTLDONLD PDEF DB C A Vcc C2.3T C1.3TRF- RF-OUTRF-IN C AGC AGC-OUTEFM-IN HPF TE BAL EFM comparator Control 1) Automatic Power Control (APC) circuit Laser diode has negative temperature characteristics with great optical output when the diode is driven with constant current. Therefore, current must be controlled by a monitor diode to ensure constant out- put. Thus functions the APC circuit. LD current can be obtained by measuring the voltage between LD1 and GND. The current value is approximately 35 mA. Vcc (5V) Vr LD MDUPC2572GS 16 PD 17 LD 15 Q101 2SD1664 C124 0.1mF C101 (100mF/6.3V) R101 10W LD1 R102 12W5V CONT Q102 UMD2N18 5V5V 1kW150kW 16kW R112 2.2kW C104 0.33mF 5 1kW 2.5V Pickup unit
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CX-680 3 2) RF amplifier and RF AGC amplifier Photodetector outputs (A+C and B+D) are added, am- plified and equalized in IC101, and output to the RFI terminal as RF signal. (Eye pattern can be checked at this terminal.) Low-frequency components of voltage RFI is: RFI = (A + B + C + D) x 3.22 where R111 is offset resistor to keep RFI signal within the output range of the preamplifier. RFI signal is goes under AC coupling, and is input to Pin 4 (RFIN terminal). IC101 contains an RF AGC circuit. RFO output from Pin 2 is maintained to a constant level (1.2 ±0.2 Vp-p). The RFO signal is used in the EFM, DFCT, and MIRR circuits. 3) EFM circuit The EFM circuit converts RF signal into digital sig- nals of Ò0Ó and Ò1.Ó RFO signal after AC coupling is input to Pin 1, and supplied to the EFM circuit. Asymmetry caused during manufacturing of discs cannot be eliminated solely by AC coupling. There- fore, the system controls the reference voltage ASY of the EFM comparator by using the fact that proba- bility to generate Ò0Ó and Ò1Ó is 50% in EFM signal. This reference voltage ASY is generated by output from the EFM comparator through L.P.F. EFM signal is output from Pin 35. As signal level, amplification is 2.5 Vp-p around REFO. 4) DFCT (defect) circuit DFCT signal detects mirror defect in discs, and is out- put from Pin 33. The system outputs ÒHÓ when a mir- ror defect is detected. If disc is soiled, the system determines it as lack of mirror. Therefore, the system inputs the DFCT signal output to the HOLD terminal of servo LSI. Focus and tracking servo drives change to Hold status only when DFCT output is in ÒHÓ so that performance of the system upon detection of defect can be im- proved. 5) RFOK circuit The RFOK circuit outputs signal to show the timing of focus closing servo, as well as the status of focus closing during playback. The signal is output from Pin 32. The system inputs the RFOK signal output to the RFOK terminal of servo LSI. The servo LSI issues Focus Close command. The system outputs signal in ÒHÓ during focus closing and playback. CN101 12 7DETECT 1311 1010kW20kW 9.3kWRFI +5V R111 27kW Vcc ´12ASY 1320kW (RF AGC) AGC RF ENVELOPE HPF VDC RFOK20kW 33 36 35 34 PEAKDEFECTEFM UPC2572GS A+C 10kW B+D9.3kW 20kW 10kW 10kWR105 6.8kW C125 3pF C105 47pF C128 33PR123 10K Q103 2SK303Q104 UN2111 R104 8.2kW RFINC107 4.7mF/35V C122 0.1mFC106RFO REFO (+2.5V) DEFECT BOTTOM R107 8.2kW R106 18kW C111 3300pF C110 C112 0.047mF 6 54 3 21 320.1mF 0.01mF 12 3 SCONT CWX2165 (CXK5121) Fig. 3 RF AMP, RF AGC, EFM, DFCT, RFOK Circuit