Onkyo TXSR 8350 Service Manual

Page 1

TX-SR503/503E/8350

Ref. No. 3863

ONKYO SERVICE MANUAL °42°°5

AV RECEIVER

MODEL TX-SR503
MODEL TX-SR503E
MODEL TX-SR8350

ammo

E 02%;

TX-SR503 Black and Silver and Golden models

RC-607M

B MDD, B MDC, S MDC 120V AC, 60Hz

B MPA, S MPA 230-240V AC, 50Hz

B MWT, S MWT, G MWT 120V/220-230V AC, SO/OOHZ
G MGR, G MGQ, G MGK 220-230V AC, 50/60Hz

TX-SR503E Black and Silver models

l B MPP, s MPP |23o-240v AC, 50Hz
TX-SR8350 Golden model

GMGR

|220-230v AC, 50/60Hz

SAFETY-RELATED COMPONENT
WARNING! !

COMPONENTS IDENTIFIED BY MARK A ()N THE
SCHEMATIC DIAGRAM AND IN THE PARTS LIST ARE
CRITICAL FOR RISK OF FIRE AND ELECTRIC SHOCK.
REPLACE THESE COMPONENTS WITH ()NKYO
PARTS WHOSE PART NUMBERS APPEAR AS SHOWN
IN THIS MANUAL.

MAKE LEAKAGE-CURRENT ()R RESISTANCE
MEASUREMENTS TO DETERMINE THAT EXPOSED
PARTS ARE ACCEPTABLY INSULATED FROM THE
SUPPLY CIRCUIT BEFORE RETURNING THE
APPLIANCE TO THE CUSTOMER.

ONKYO.

IMAGINATIVE SIGHT & SOUND

Page 52

A l B
PRINTED CIRCUIT BOARD VIEWS-7

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(NAAF-8523)

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Page 69

TX-SR503/503E/8 0

IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS-9
0201: CS494003CQZ (Mum-Standard Audio Decoder)-8I11

HDATAO, GPIOO

In parallel host mode, these pins provide a bidirectional data bus. These pins can also act as
general purpose input or output pins that can be individually configured and controlled by
DSPC. These pins have an internal pull-up. BlDlFtECT/ONAL - Default: INPUT

A0, GPIO13 --- Host Parallel Address Bit 0, General Purpose IIO

In parallel host mode, this pin serves as the LS Bit of a two bit address input used to select
one of four parallel registers. This pin can act as a general-purpose input or output that can be
individually configured and controlled by DSPC. BlDlFiECT/ONAL - Default: INPUT

A1, GPIO12 --- Host Address Bit 1, General Purpose IIO

In parallel host mode, this pin serves as the MS Bit of a two bit address input used to select
one of four parallel registers. This pin can act as a general-purpose input or output that can be
individually configured and controlled by DSPC. BID/HECTIONAL - Default: INPUT

W, Ft/W, GPIO11 Host Parallel Output Enable, Host Parallel R/W, General Purpose l/O

In parallel host mode, this pin serves as the active»low data bus enable input. In Motorola
parallel host mode, this pin serves as the read-highlwhite-Iow control input signal. This pin can
act as a general-purpose input or output that can be individually configured and controlled by
DSPC. This pin has an internal pull-up. BID/HECTIONAL » Default: INPUT

WR, DS, GPI010 --- Host Write Strobe, Host Data Strobe, General Purpose IIO

In Intel parallel host mode, this pin serves as the active-low data bus enable input. In Motorola
parallel host mode, this pin serves as the read-highlwrite-low control input signal. In serial host
mode, this pin can serve as a general purpose input or output bit. This pin can act as a
general-purpose input or output that can be individually configured and controlled by DSPC.
This pin has an internal pull-up.

BID/RECTIONAL - Default: INPUT

(E, GP|09 Host Parallel Chip Select, General Purpose IIO

In parallel host mode, this pin serves as the active»low chip-select input signal. This pin can
act as a general-purpose input or output that can be individually configured and controlled by
DSPC. This pin has an internal pull-up. BlDlFtECT/ONAL - Default: INPUT

HINBSY, GPIO8 Input host Message Status, General Purpose IIO

This pin is indicates that serial or parallel communication data written to the DSP has not been
read yet. This pin can act as a general-purpose input or output that can be individually
configured and controlled by DSPC. This pin has an internal pull»up. BID/RECTIONAL
Default: OUTPUT

SD_DATA15, EXTA18 --- SDRAM Data Bus, SFtAM External Address Bus
SD_DATA14, EXTA17
SD_DATA13, EXTA16
SD_DATA12, EXTA15
SD_DATA1 1 , EXTA14
SD_DATA10, EXTA13