Kenwood KRX 891 Service Manual

Page 2

KRX-591/891

REMOTE CONTROL UNIT ........ PC BOARD ............................... 29
DISASSEMBLY FOR REPAIR... SCHEMATIC DIAGRAM .......... 37
BLOCK DIAGRAM .............. EXPLODED VIEW ..... 57
CIRCUIT DESCRIPTION MECHANISM ....... .....57
OPERATION USING TIMER.. UNIT ............... 58
ADJUSTMENT ........................ PARTS LIST... ..... 63
WIRING DIAGRAM ............................................... 27 SPECIFICATIONS ............................ BACK COVER

Knob Panel ass'y Dressing plate Knob

(K29-4113-04) (Aso-ooes-oz) (803-2694-03) (K29-41 12-03)

Knob
(K2941 17-04)

Remote
controlle ass'y
(A70'0514-05)

Knob Dressing plate
(K29-4121 -oa) (803-2696-03)

Knob ' I
(K29-4120-03) Cassette holder ass'y (B)

Cassette holder ass'y (A) (A53 1
- 279-03)

(A53-1278-03)

Knob Knob
(K29-41ZO-03) (K29-4121 ~03)

Photo is KRX~891.
Refer to parts list on page 63

Page 11

Pin Function

CIRCUIT DESCRIPTION

KRX-591/ 891

Pin No. I Pin Name 1 I/O Name Description

1~47 $3~SO O d~a segment drive/key scan
5~B P00~P03 I KRO~KR3 Keyvmatrix, key return input
5; P10 1 ' REMIN Remote control input Active Low
10 P11 i fi Backup detection Active Low
11 P12 | \ W Stereo broadcast detection Active Low
12 P13 | EB Station detection Active Low
13 P20 0 l CLK Control PLL IC (LM7OOT) Clock
14 P21 0 DATA Control PLL IC (LM7001) data
15 P22 0 ST Control PLL lC (LM7001) strobe
16 P23 0 W Mute signal out Active Low
17 P30 l/O BUSY system control signal input/output (BUSY)

18 P31 i/O SDATA System control signal input/output (DATA)

19, 20 P32, P33 Noused GND
21 P60 i PROTECT Protection signal input .
22 P61 0 i_W OFF institute Band "LW L: LW H: OFF
23 P62 0 CH»SPACE institute "Channel space" (FM) L: 100K H: 50K
24 P63 l WARN Defect detection of AVR
25 P40 0 POWER Power relay control H: Power ON
26 P41 0 MONO Monaural control H: Mono
27 P42 0 SPRLY Control OUTPUT relay H: Relay ON
28 P43 0 LTAPEA Input selector LED (TAPE A) ACthe LOW
29 PPO O m Input selector LED(VI DEO/AUX) Active Low
30 X1 l System clock oscillation (cwstal 4194304 MHZ)

31 X2 0 System clock oscillation (crystal 4.194304 MHZ)
32 V53 Power supply (GND)

33, 34 XTI, XT2 i No used
35 P50 J o WPEB Input selector LED(TAPE B) Active Low
35 P51 0 m Input selector LED(TUNER) Active Low
37 P52 0 W Input selector LED < PHONE) Active Low
38 P53 0 5 input selector LED( CD) Active Low
39 W Reset L: RESET

40~48 T0~T8 O 9G~ lG Grit control

49~53 3' 33,3, 0 No used

54. 55 511, S10 0 A, k segment drive/Key scan
56 VLOAD Pull-down for FL (-30 V)

57 VPRE Predriver for FL J
58~63 $9~S4 O j~e Segment drive/key scan
F 64 VDD Power supply (+5 V)

13

Page 96

RXD-25/25L

7-3. Explanation of terminals

CIRCUIT DESCRIPTION

38

Terminal Ne. Terminal name IIO Function
1 4/st SEL | When this terminal is set to "Low" or Open", time-sharing input of the L-ch and Fl-ch
data will take place from pin 15. When set to High", the L-ch data will be
input from pin 15, while the R-ch data will be input from pin 14.
a (Pull-down is provided inside the 1C by means of a 100m resistor.)
2 Digital GND - GND terminal of the logic section.
l 3 NC - Non connection.
4 Digital VDD ~ Power supply terminal for the logic section,
5 Analog GND - GND terminal of the analog section.
u 6 Rch OUTPUT Output terminal for Fl-ch analog signals.
7. 8 Analog VDD - Power supply terminals for the analog section.
9 R-ch Voltage Reference - Reference voltage terminals Normally, they are connected to A GND by way of a
10 Lch Voltage Reference capacitor to reduce the impedance at high frequencies.
11 Lch OUTPUT 0 Output terminal for L-ch analog signals.
12 Analog GND - GND terminal for analog section.
13 Left/Right Clock l When pin 1 is either "Low" or "Open". serves as the input terminal for LEFT/FilGHT
WORD Clock identification signals for the input data.
When pin 1 is High", it serves as an input terminal for WORD identification signals for the
input data,
14 Left/Right Selection l When pin 1 is either Low" or "Open", this terminal selects the left and right polarities for
Fl-ch Serial Input the L~ch and R-ch CK signals.
If L-ch data is to be input when the UH CK signals are High". the UH SEL terminal is set
to "Low, whereas, if L-ch data is to be input when the UH CK signals are "Low. the
terminal is set to "High"
When pin 1 is "High", the terminal serves as the input terminal for Flch serial data.
15 Serial Input l When pin 1 is either Low or Open",-the terminal serves as that for inputting serial data
L-ch Serial input of the L-ch and Fl-ch, alternately.
When pin 1 is High". it serves as an input terminal for L-ch serial data.
16 CLOCK | Input terminal for the READ clock of serial input data.