Bose 321 273029 top
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2 THEORY OF OPERATION System Overview The 3 -21 Series II is a single-zone home entertainment system. It has two configurations: (1) basic/standard system with no Ethernet interface and no hard drive or uMusic TM function. This system will be available with either the standard 3 21 speaker arrays or the Gemstone TM speaker arrays. (2) A premium system including the Ethernet interface and hard drive and uMusic. This system will also incorporate the array speakers developed in the Gemstone project. The 3 21 Series II system consists of the following major components: 1. Console with Display, Main board, Tuner board, button board and IR remote receiver, CD/DVD driver, Hard disk driver (premium version only). 2. Bass module Unit with Woofer, DSP board, I/O board and system power supply. 3. Two two-element speaker arrays. 4. IR remote control. Console Theory of Operation The basic elements of the console are: 1. Main board. 2. Tuner board. 3. VFD display. 4. DVD ROM driver. 5. Button board. 6. IR receiver. 7. Hard disk driver (premium only) 8. Ethernet interface (premium only) 1. Power Supply Note: Refer to the 3 21 II console schematic sheets, 270593, for the following information. The bass module provides un-regulated power V_UNREG to console via connector J100 pins 1 and 2 [sheet 10, B2]. The power supply electronics are comprised of 4 main sections; switching power supplies, linear power supplies, power supply synchronization, and power fail detection. The consoles input voltage, V_UNREG, comes from the bass module and is nominally 26VDC. This voltage varies with load and line levels, but is limited to 31.5V maximum (assuming line voltage of 140V AC). This voltage is always present whenever the bass module is plugged into the wall and so the consoles power supplies are likewise active. All the voltage level source are listed in following table: Note: The 1.8V and 3.3V linear regulators are derived from the +5V switching power supply. The 9V linear regulator is derived from the +12V switching power supply. Node Name Output Voltage Type Input from Outputs to V_UNREG +26 Full wave rectifier Bass module at line of 120VAC +12V and +5V switching power supply +12V +12 Switching V_UNREG DVD drive, Tuner board, VFD display, Video control relay. +9V +9 Linear +12V Analog MUX, DAC output filter op-amps, Summing op-amps and Zone speaker differential input op- amps. +5V +5 Switching V_UNREG +3.3V and +1.8V switching power supply; DVD drive, Hard disk driver, IR receiver, DAC, SPDIF receiver. +3.3V +3.3 Linear +5V Processor CS98200s I/O power, Flash, SDRAM ICs, Ethernet controller, SPDIF receiver, +1.8V +1.8 Linear +3.3V Processor CS98200s core and PLL circuit power; power on/monitor reset chip.
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3 1.1. Switching Power Supplies The +12V and +5V switching power supplies use ST L4973D3.3 regulator ICs (U17 [sheet 14, B5] and U2 [A6]). The power supplies are designed as step-down Buck converters. The voltage fed back to the chip on pin 13 determines the output voltage; the chips control circuitry will work to keep this voltage at +3.3V. The +5.1V and +12V supplies use resistor divide-down networks to obtain the +3.3V feedback voltage. The reference designators listed below correspond to the +12V switching power supply; the designs of the +5V regulator is nearly identical. A number of additional series inductors and parallel capacitors exist to provide filtering func- tions. The compensation networks used for these switching power supplies have been chosen to provide stability under all conditions and to provide minimal RF interference to the tuner. The supplies function in both continuous and discontinuous mode depending on the load. 1.2. Linear Power Supplies U18 [C3] is the +9V linear regulator. VR1 [A3] and VR2 [A2] are the 3.3V and 1.8V linear regula- tor, respectively. 1.3. Supply Synchronization In order to control the noise interference to the AM tuner, a variable frequency to alternate switching synchronization scheme was implemented. When the console is in the Tuner mode, the SPDIF receiver (U8001 [sheet 12, B4]) delivers a 2.8224MHz clock signal (SPDIFIN_BCK) from the 11.2896MHz crystal oscillator. SPDIFIN_BCK drives the binary count (U3 [sheet 14, C4]) and generates a required synchronizing pulse (F_SYNCH) and feed to pin 20 of U17 [C5] and pin 20 of U2 [B6]. Q4 [D3] and Q5 [D3] are for buffering and level shifting of the synchroniz- ing pulse. The synchronization pulse alternation is controlled by tuner board based on the AM station to be tuned. THEORY OF OPERATION IC Pin Components Connected Function 1 R17, C50 Sets free running switching frequency (when not controlled externally) 10 C25 Bootstrap to drive internal D-MOS 11 R33 Inhibits supply 12 R36 C22 C24 Lead-lag filter for compensation loop 13 R30 R37 Voltage feedback for control 18 C51 +5.1V for external reference 19 C58 Sets supply soft-start time constant 20 Q5 Supply frequency switching synchronization (see section 2.4 below)