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ALPHA 10/10P SERVICE MANUAL

ALPHA 10/10P SERVICE MANUAL
CIRCUIT DESCRIPTION

The mother PCB is common for both the A10 and A10P with the exception of the input mode switch and pre-amp
output mute relay which are only fitted to the A10 and the power/standby LED and links to parallel the input
connections to what would otherwise be the pre-amp output for use with a mono link. The amplifier is based on the
D290/Alpha 9 design but with lower gain, a higher current and higher voltage driver stage and a high power output
stage. The current servo has been improved over the Alpha 9 to be output device independent. A micro supervises
the amplifier state, switch state and remote control functions. Provision is made for an additional 3rd channel PCB to
be added with power supply and protection circuitry access.

Input stage

The input connections are taken either from the pre-amp connector, LK12X, or the external power amp input on the
A10 depending on the position of SW1. On the A10P, the input is taken from the external power amp input only with
provision fora mono shorting link by having two parallel input connectors. On the A10, there is a mute relay on the
pre-amp outputs which are always connected to the pre-amp connector, LK12X.

The signal is passed through a low pass filter with a -3dB point of 550KH2 at normal gain and 740KH2 at low gain.
The gain is selected by SW2. C72 and C74 are do. blocking capacitors with a -3dB point of 0.7Hz. A d.c. error
correction current is injected into the base of Q19 and 26 from the voltage servo Z3 and 4, to null any voltage offset at
the amplifier output.

The input and voltage amplifier stages both run off regulated 15 Volt suppies. The input stage is an NPN differential
input, Q18, 19, 25 and 26, with an adjustable current source, Q21 and 28 which sets the quiescent current through all
the stages but specifically the output stage. CS7, R58, C49 and R66 keep the input stage and voltage amplifier stable.
Q52, 53, 54 and 55 form a current mirror to ensure that the differential input is balanced during normal operation.

Voltage Amplifier

The voltage amplifier consists of another differential pair, Q48, 49, 50 and 51. Q48 and 50 are the positive pulling side
of the voltage amplifier output and Q49 and 51 pull negative via a current mirror 08, 9, 10 and 11. The network C12,
36, R74 and 77 give the current mirror gain to compensate for the fact that Q49 and Q51 is only driven from the low-
impedance side of the input stage current mirror. The network ensures a fast, symmetrical slew rate of the voltage
amplifier stage.

Network 069, 70, R172, 174 ensure the overall stability of the amplifier by reducing the open loop gain at high
frequencies.

Second Voltage Amplifier and Driver Stage

Q33, 36, 41 and 44 are the next voltage amplifier stage with feedback applied from the output coupled to their
emitters. This stage runs on the full supply rail voltages and splits the level shifts the signal via Q2, 3, 5 and 6 to drive
the gates of the output MOSFETs, Q13, 14, 15 and 16. Q2 and 3 simply buffer the inverted signal at the collector of
Q36 to drive the low side MOSFETs, Q13 and 15. Q5 and 6 invert the inverted signal at the collector of Q41 and Q44
to drive the high side MOSFETs, Q14 and 16. To ensure that the high side drive is able to swing far enough to ensure
the high side MOSFETs can be driven to saturation, a bootstrap, 05, D41 R57, 078 and D22 boosts the driver stage
power supply during positive excursions of the amplifier output. This is inactive at low output voltage swings as any
distortion induced by the network would be more audible at such levels.

Output Stage

Both the high and low side output devices feature over-current protection, Q17, 23, 24, 30 which clamps the gate of
the MOSFET it protects. A high current is permitted through the MOSFET for a few milliseconds after which time the
current is throttled down to about 10A peak. A second current sensing network, Q32 and Q35 activates the
over-current protection cut-out if the low side is current limiting for too long, a few hundred milliseconds. The current
sensing resistors do not reduce the transconductance of the MOSFETs because the driver stage is referenced to the
MOSFET source. This means that the current through the driver stage is also sensed but this is insignificant as fas as
over-current protection sensing is concerned.

Auto-bias

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ALPHA 10/10P SERVICE MANUAL

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Figure 1B|ock Diagram of Power Amplifier

The bias is regulated in two modes, one where these is no signal and one when signal is being split between the high
and low side MOSFETs when driving a alternating signal into a load.

Under static conditions, 28 simply compares the sensed current, which includes the driver stage current, with a do.
mode reference of 13mV. The sense resistor is 0.11 so this corresponds to a current of about 120mA, some of which
is driver current. The current through the MOSFETs is about 80mA at this point. The comparator output is level shifted
to drive the integrating current servos Z3 and 4. This adjusts the amplifier current so that, on average, the bias level is
held at the reference point.

Under dynamic conditions, the low side drive will definitely be conducting more current than the reference (80mA) for
half the signal cycle and will be switched off for the other half. The result is a rectangle wave output from the
comparator, Z4.

When the output stage is biassed correctly (class AB operation) the comparator output toggles when the current
through the sense resistor for the -ve MOSFET is equal to the dc. mode static reference level and at the half way
point of the signal. The result is a perfect square wave output from the comparator. Under these conditions, the we
MOSFET is also conducting the same amount of current at this point. If the bias level is lower than the reference, say,
at zero (class B operation) then the -ve MOSFET will spend slightly less than half the time conducting at or above the
reference level resulting in a rectangle wave output from the comparator at a duty cycle slightly less than 50%. If the
bias level is higher than the reference then the -ve MOSFET will spend slightly more than half the time conducting at
or above the reference level resulting in a rectangle wave output at a duty cycle slightly more than 50%. The change
in duty cycle away from 50% causes the integrator, Z3 and 24 to adjust the bias level via the bias adjusting
transistors, Q22 and 29.

The integrator has a reference, the a.c. mode dynamic reference, fora bias point slightly higher than for a 50% duty
cycle. This eliminates the possibility of the bias being slowly throttled due to component tolerance mismatch resulting
in a reference which would pull the servo down. A high dynamic bias reference level simply stabilises the bias slightly
higher than the static reference but a low dynamic reference causes the bias to drift down to complete throttle.

This system works if the signal is a.c., symmetrical and is not a rectangle wave. Certainly, only a.c. signals are passed

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Figure 2 Auto-bias under dynamic conditions

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